diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c
index 7322027..cec5c2b 100644
--- a/cpu/mpc5xxx/cpu_init.c
+++ b/cpu/mpc5xxx/cpu_init.c
@@ -155,6 +155,11 @@
 #if defined(CFG_GPS_PORT_CONFIG)
 	*(vu_long *)MPC5XXX_GPS_PORT_CONFIG = CFG_GPS_PORT_CONFIG;
 #endif
+
+#if defined(CONFIG_MPC5200)
+	/* enable timebase */
+	*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
+#endif
 }
 
 /*
@@ -171,11 +176,6 @@
 	*(vu_long *)MPC5XXX_ICTL_CRIT |= 0x0001ffff;
 	*(vu_long *)MPC5XXX_ICTL_EXT &= ~0x00000f00;
 
-#if defined(CONFIG_MPC5200)
-	/* enable timebase */
-	*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
-#endif
-
 #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_MPC5XXX_FEC)
 	/* load FEC microcode */
 	loadtask(0, 2);
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index 027f319..b17d7f3 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -32,7 +32,7 @@
 #define CONFIG_INCA_IP		1	/* on a INCA-IP Board	*/
 
 /* allowed values: 100000000, 133000000, and 150000000 */
-#define CPU_CLOCK_RATE	133000000   /* 133 MHz clock for the MIPS core */
+#define CPU_CLOCK_RATE	133000000	/* 133 MHz clock for the MIPS core */
 
 #if CPU_CLOCK_RATE == 100000000
 #define INFINEON_EBU_BOOTCFG	0x20C4	/* CMULT = 4 for 100 MHz */